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Agilent Technologies’ Parasitic Reduction Tool Enhances RFIC Simulation Speed, Capacity While Preserving Accuracy

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Jivaro-for-GoldenGate parasitic reduction results for three different RF circuits; a voltage controlled oscillator, a power amp and a receiver. Jivaro-for-GoldenGate significantly reduces the size of the parasitic extracted netlist, the post-reduction memory footprint for GoldenGate and the resulting GoldenGate simulation time.

Image 1:
Jivaro-for-GoldenGate parasitic reduction results for three different RF circuits; a voltage controlled oscillator, a power amp and a receiver. Jivaro-for-GoldenGate significantly reduces the size of the parasitic extracted netlist, the post-reduction memory footprint for GoldenGate and the resulting GoldenGate simulation time.

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	Related Information

	Press Release:	Agilent Technologies’ Parasitic Reduction Tool Enhances RFIC Simulation Speed, Capacity While Preserving Accuracy (2008-November-04)
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